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SPARC M6-32 and SPARC M5-32 Servers Installation Essentials

Question No: 31

On the SPARC M5-32 platform, CMU11 is located in DCU2. If an error is reported on CMU11, which command would you use to identify the PDomain number that has DCU2 assigned?

  1. show /System/DCTs/DCU_2/CMD_11 location

  2. show /SySt8m/Processor/cpUs/cro_22 location

  3. show /Servers/PDomains/ _level 2 _t dcus_assigned

  4. show /Servers/PDomains/ -level 2 CMU 11

Answer: B

Question No: 32

Which three components require IP addresses when you configure the SP network?

  1. SPO

  2. SP1


  4. SPARE_ SP


Answer: A,B,C

Question No: 33

What are three genera, guidelines for creating the ZFS root pool?

  1. Always create mirrored pools, even if the controller provides H/W -based RAID. ZFS needs to be able to correct the data if it detects corruption.

  2. If the controller provides H/W-based RAID, then it is not necessary to create mirrored pools.

  3. If you ADD a disk to mirror the root pool, you must also manually perform aninstallboot or installgrub on that disk to make it bootable. If the root pool is initially created as a mirrored pool, this is not necessary.

  4. For non-root pools, you must partition the disk and assign slices to various partitions.

  5. In the case of rpool, the disks need to be sliced. It is recommended to have only a single slice of the full disk size used by ZFS on the although a small slice can be allocated for

non-ZFS use (for example, SVM metabd).

Answer: A,B,C

Question No: 34

You are ready to run SunVTS. Which two commands can you use?

  1. startsunvts-t

  2. startsunvts -all

  3. startsunvts -g

  4. startvts

Answer: A,D

Question No: 35

Which three options are supported memory population options for the SPARC M5-32 server?

  1. CMU with no memory/DIMM populated

  2. CMU with 1/4 populated with DIMM Q

  3. CMU with 1/2 populated with DIMM

  4. CMU with full populated with DIMM

  5. CMU with 1/8 populated with DIMM

Answer: B,C,E

Question No: 36

Given a SPARC M5-32 server in which each CMU has 2x M5 processors, each processor has 2x memory controllers, and each memory controller can have 2x BoB, how many memory modules/ sections can there be in each CMU?

  1. l

  2. 2

  3. 4

  4. 8

Answer: C

Question No: 37

Which statement is true regarding the SPARC M5-32 server SP (service processor) and SPP (service processor proxies)? Each SPARC M5-32 server has

  1. 2x SP, and works with 16x SPP local in 16x CMU

  2. 2x SP, and works with 4x SPP local in 4x IOU

  3. 2x SP, and works with 4x SPP local in 4x DCU

  4. 2x SP, and works with 16x SPP local in 4x DCU and 4x IOU

Answer: B



Question No: 38

You need to power down HOST 1 to add additional memory to a CMU. Which command do you execute?

  1. power -off /HOST1

  2. set keyswitch off /HOSTI

  3. power /HOST1 off

  4. stop /HOSTI

Answer: C

Reference: http://docs.oracle.com/cd/E24355_01/html/E41214/z4000f4d1453042.html

Question No: 39

A customer wants you to create a user account for a night-shift employee to be able to monitor the system but do nothing else. Which privilege do you assign to this user?

  1. user (u)

  2. administrator (a)

  3. console (c)

  4. read-only operator (o)

Answer: B

Question No: 40

Which three statements are correct about data paths in the SPARC M5-32 server?

  1. Within a DCU, a CPU talks to another CPU directly by using the coherency switch. The

    SSB is not needed.

  2. From one DCU to a different DCU, an even talks with only another even (same for odd) and hops to the odd-numbered board, if needed, on the destination DCU.

  3. From one DCU to a different DCU, all CPUs can access all PCIe slots In the destination DCU directly in one hop.

  4. A DCU can communicate data only with other DCUs via the BX ASICs on the SSB.

  5. From one DCU to a different DCU, even CPUs can access ail the odd PCIe slots in the destination DCU directly in one hop.

Answer: A,C,D

Reference: http://docs.oracle.com/cd/B10501_01/server.920/a96533/statspac.htm

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